Abstract
Reversible Spiking Neural Networks (RevSNNs) enable memory-efficient training by reconstructing forward activations during backpropagation, but suffer from high latency due to strictly sequential computation. To overcome this limitation, we propose ParaRevSNN, a parallel reversible SNN architecture that decouples sequential dependencies between reversible blocks while preserving reversibility. This design enables inter-block parallelism, significantly accelerating training and inference while retaining the memory-saving benefits of reversibility. Experiments on CIFAR10, CIFAR100, CIFAR10-DVS, and DVS128 Gesture demonstrate that ParaRevSNN matches or exceeds the accuracy of standard RevSNNs, while reducing training time by up to 35.2\% and inference time to 18.15\%, making it well-suited for deployment in resource-constrained scenarios.
Abstract (translated)
可逆脉冲神经网络（RevSNN）通过在反向传播过程中重构前向激活来实现高效的内存训练，但因其严格遵循的顺序计算导致了较高的延迟。为克服这一限制，我们提出了ParaRevSNN，这是一种并行的可逆SNN架构，在解耦各个可逆块之间的顺序依赖性的同时保留了可逆性。这种设计使跨块并行化成为可能，显著加速了训练和推理过程，同时保持了可逆性的内存节约优势。在CIFAR10、CIFAR100、CIFAR10-DVS以及DVS128手势数据集上的实验表明，ParaRevSNN的精度与标准RevSNN相当或更优，并且将训练时间减少了高达35.2%，推理时间缩短至18.15%，使其非常适合在资源受限场景中部署。
URL
https://arxiv.org/abs/2508.01223
