Abstract
How spiking neuronal networks encode memories in their different time and spatial scales constitute a fundamental topic in neuroscience and neuro-inspired engineering. Much attention has been paid to large networks and long-term memory, for example in models of associative memory. Smaller circuit motifs may play an important complementary role on shorter time scales, where broader network effects may be of less relevance. Yet, compact computational models of spiking neural networks that exhibit short-term volatile memory and actively hold information until their energy source is switched off, seem not fully understood. Here we propose that small spiking neural circuit motifs may act as volatile memory components. A minimal motif consists of only two interconnected neurons -- one self-connected excitatory neuron and one inhibitory neuron -- and realizes a single-bit volatile memory. An excitatory, delayed self-connection promotes a bistable circuit in which a self-sustained periodic orbit generating spike trains co-exists with the quiescent state of no neuron spiking. Transient external inputs may straightforwardly induce switching between those states. Moreover, the inhibitory neuron may act as an autonomous turn-off switch. It integrates incoming excitatory pulses until a threshold is reached after which the inhibitory neuron emits a spike that then inhibits further spikes in the excitatory neuron, terminating the memory. Our results show how external bits of information (excitatory signal), can be actively held in memory for a pre-defined amount of time. We show that such memory operations are robust against parameter variations and exemplify how sequences of multidimensional input signals may control the dynamics of a many-bits memory circuit in a desired way.
Abstract (translated)
突触触发神经元网络在不同时间和空间尺度上编码记忆构成了神经科学和神经灵感工程的基础话题。对大型网络和长期记忆的关注较多,例如结合记忆模型。小型电路主题可能在较短的时间尺度上扮演重要的补充角色,而更广泛的网络效应可能不那么相关。然而,具有短期易失性的突触触发神经元网络的紧凑计算模型,表现出短期记忆,并积极地保存信息直到能源源关闭,似乎尚未完全理解。在这里,我们建议,小型突触触发神经元电路主题可以被视为易失性记忆组件。一个最小的主题仅由两个相互连接的神经元组成--一个是自我连接的兴奋性神经元,另一个是抑制性神经元--并实现一个单比特的易失性记忆。兴奋性延迟自我连接促进一个双向电路,其中自维持的周期性轨道产生的 spike 序列与没有突触活动的静止状态共存。临时外部输入可能直接诱导这两个状态之间的切换。此外,抑制性神经元可以充当自主关闭开关。它将整合 incoming 兴奋性脉冲直到一个阈值被达到,然后抑制兴奋性神经元发放 spike,结束记忆。我们的结果显示,外部信息位(兴奋性信号)可以 actively 保持在预定时间内。我们证明,这样的记忆操作对参数变化具有鲁棒性,并举例说明了如何一组多通道输入信号可能以期望的方式控制一个许多比特记忆电路的动态。
URL
https://arxiv.org/abs/2303.12225