Abstract
To maximize hardware efficiency and performance accuracy in Compute-In-Memory (CIM)-based neural network accelerators for Artificial Intelligence (AI) applications, co-optimizing both software and hardware design parameters is essential. Manual tuning is impractical due to the vast number of parameters and their complex interdependencies. To effectively automate the design and optimization of CIM-based neural network accelerators, hardware-aware neural architecture search (HW-NAS) techniques can be applied. This work introduces CIMNAS, a joint model-quantization-hardware optimization framework for CIM architectures. CIMNAS simultaneously searches across software parameters, quantization policies, and a broad range of hardware parameters, incorporating device-, circuit-, and architecture-level co-optimizations. CIMNAS experiments were conducted over a search space of 9.9x10^85 potential parameter combinations with the MobileNet model as a baseline and RRAM-based CIM architecture. Evaluated on the ImageNet dataset, CIMNAS achieved a reduction in energy-delay-area product (EDAP) ranging from 90.1x to 104.5x, an improvement in TOPS/W between 4.68x and 4.82x, and an enhancement in TOPS/mm^2 from 11.3x to 12.78x relative to various baselines, all while maintaining an accuracy of 73.81%. The adaptability and robustness of CIMNAS are demonstrated by extending the framework to support the SRAM-based ResNet50 architecture, achieving up to an 819.5x reduction in EDAP. Unlike other state-of-the-art methods, CIMNAS achieves EDAP-focused optimization without any accuracy loss, generating diverse software-hardware parameter combinations for high-performance CIM-based neural network designs. The source code of CIMNAS is available at this https URL.
Abstract (translated)
为了在基于计算内存储器（CIM）的神经网络加速器中最大化硬件效率和性能准确性，特别是在人工智能（AI）应用中，同时优化软件和硬件设计参数是必不可少的。由于参数数量庞大且相互关系复杂，手动调优变得不切实际。为有效自动化基于CIM的神经网络加速器的设计与优化过程，可以采用硬件感知型神经架构搜索（HW-NAS）技术。这项工作提出了一个名为CIMNAS的联合模型量化和硬件优化框架，专门针对CIM架构。 CIMNAS同时在软件参数、量化策略以及广泛的硬件参数上进行搜索，涵盖了设备级、电路级与体系结构级别的协同优化。该研究使用MobileNet模型作为基准，并基于RRAM（阻变式存储器）的CIM架构进行了9.9×10^85种潜在参数组合的实验空间探索。在ImageNet数据集上的评估显示，CIMNAS将能源延迟面积乘积（EDAP）减少了90.1到104.5倍，同时在每瓦特TOPS（万亿次操作/秒）性能上提高了4.68至4.82倍，在每平方毫米的TOPS值上提升了11.3至12.78倍，并且保持了73.81%的准确性。通过将框架扩展以支持基于SRAM的ResNet50架构，CIMNAS展示了其适应性和鲁棒性，实现了高达819.5倍的EDAP减少。 与现有的最先进的方法不同，CIMNAS在不损失任何精度的情况下专注于EDAP优化，并生成多种软件和硬件参数组合，用于高性能的基于CIM的神经网络设计。CIMNAS的源代码可在以下网址获取：[此链接]（请将"this https URL"替换为实际提供的URL）。
URL
https://arxiv.org/abs/2509.25862
