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TinyIceNet: Low-Power SAR Sea Ice Segmentation for On-Board FPGA Inference

2026-03-03 15:21:00
Mhd Rashed Al Koutayni, Mohamed Selim, Gerd Reis, Alain Pagani, Didier Stricker

Abstract

Accurate sea ice mapping is essential for safe maritime navigation in polar regions, where rapidly changing ice conditions require timely and reliable information. While Sentinel-1 Synthetic Aperture Radar (SAR) provides high-resolution, all-weather observations of sea ice, conventional ground-based processing is limited by downlink bandwidth, latency, and energy costs associated with transmitting large volumes of raw data. On-board processing, enabled by dedicated inference chips integrated directly within the satellite payload, offers a transformative alternative by generating actionable sea ice products in orbit. In this context, we present TinyIceNet, a compact semantic segmentation network co-designed for on-board Stage of Development (SOD) mapping from dual-polarized Sentinel-1 SAR imagery under strict hardware and power constraints. Trained on the AI4Arctic dataset, TinyIceNet combines SAR-aware architectural simplifications with low-precision quantization to balance accuracy and efficiency. The model is synthesized using High-Level Synthesis and deployed on a Xilinx Zynq UltraScale+ FPGA platform, demonstrating near-real-time inference with significantly reduced energy consumption. Experimental results show that TinyIceNet achieves 75.216% F1 score on SOD segmentation while reducing energy consumption by 2x compared to full-precision GPU baselines, underscoring the potential of chip-level hardware-algorithm co-design for future spaceborne and edge AI systems.

Abstract (translated)

准确的海冰测绘对于极地地区的海上安全导航至关重要,尤其是在快速变化的冰况下,需要及时和可靠的信息。虽然Sentinel-1合成孔径雷达(SAR)提供了高分辨率、全天候的海洋冰层观测数据,但传统的地面处理受限于下行链路带宽、延迟以及传输大量原始数据的能量成本问题。而通过在卫星载荷中直接集成专用推理芯片实现的空间处理提供了一种变革性的替代方案,在轨道上生成可操作的海冰产品。 在此背景下,我们介绍了TinyIceNet,这是一种专门为双极化Sentinel-1 SAR图像设计的小型语义分割网络,用于在严格的硬件和功率约束条件下进行发展阶段(SOD)映射。通过使用AI4Arctic数据集训练,TinyIceNet结合了雷达感知的架构简化与低精度量化技术来平衡准确性和效率。该模型采用高层次综合方法合成,并部署于Xilinx Zynq UltraScale+ FPGA平台上,在显著降低能耗的同时展示了接近实时推理的能力。实验结果表明,TinyIceNet在SOD分割中实现了75.216%的F1得分,与全精度GPU基准相比将能源消耗降低了两倍,突显了芯片级硬件-算法协同设计对于未来空间和边缘AI系统潜力的重要性。 该研究强调了专用推理芯片和硬件优化模型对提高太空任务效率的关键作用,并为未来的极地观测提供了重要的技术基础。

URL

https://arxiv.org/abs/2603.03075

PDF

https://arxiv.org/pdf/2603.03075.pdf


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